PMP4016, 36VDC - 72VDC Input, 5V/36A Interleaved Active Clamp forward Reference Design

参考设计 属于: Texas Instruments

PMP4016, 36VDC - 72VDC Input, 5V/36A Interleaved Active Clamp forward Reference Design
PMP4016, Reference design generates a 5V/36A output from a standard 48V telecom input. Two UCC2891 controllers are configured to control two interleaved active-clamp forward power stages. The secondary circuitry implements self-driven synchronous rectifiers for a highly efficient design. Splitting the power into two paralleled power stages reduces conduction losses and allows this design to achieve efficiencies greater than 94 percent