PMP11184.1, High Efficiency, High Power Density 1V/120A (4+1+1) Reference Design for ASIC Processors

PMP11184.1, High Efficiency, High Power Density 1V/120A (4+1+1) Reference Design for ASIC Processors. The PMP11184 is a chipset solution for high current ASIC core rail regulation. It utilizes TPS53647 4-phase controller for 120A high current rail, which employs DCAP+ control for fast transient response and proprietary Auto Balance for tight steady and dynamic phase-to-phase current balance. It also utilizes TPS40428 dual controller for dual 30A rails. Both controllers drive NexFET smart power stages for high power density and efficiency. PMBUs capability and on-board NVM enable easy design, configuration and customization, with telemetry of output voltage, current, temperature and power