PMP11180.2, High Light-Load Efficient 4.5 - 6VDC Input, 6.6W/3.3VDC Reference Design with 4 POL Outputs
参考設計 著者: Texas Instruments
PMP11180.2, High Light-Load Efficient 4.5 - 6VDC Input, 6.6W/3.3VDC Reference Design with 4 POL Outputs. This design uses the UCC28740 in a flyback topology to minimize no-load standby power and the UCC24636 synchronous rectifier controller to minimize power MOSFET body-diode conduction times. The design also features point-of-load converters from the main 5V rail that implement an energy-saving Eco Mode. All of the devices within the design work together to improve light-load efficiency to help meet agency approvals
