LIFCL-17-8MG121I

Description:	FPGA CrossLink-NX Family 17000 Cells 28nm Technology 1V 121-Pin CSFBGA
Introduction date:	Feb 17, 2021
Updated:27-OCT-2024
See more Field Programmable Gate Arrays - FPGAs by Lattice Semiconductor

Overview

Familiarize yourself with the fundamental general information, properties, and characteristics of the component, along with its compliance with industry standards and regulations.

LifeCyclePremium

EU RoHS Yes

RoHS Version2011/65/EU, 2015/863

EAR99

Automotive No

Supplier Cage Code66675

8542310060

Schedule B8542310060

PPAP No

AEC Qualified No

Category Path
Semiconductor > Programmable Devices > Programmable Logic Devices > Field Programmable Gate Arrays - FPGAs

Datasheet

Get a comprehensive understanding of the electronic component by downloading its datasheet. This PDF document includes all the necessary details, such as product overview, features, specifications, ratings, diagrams, applications, and more.

Supplier Datasheet
(External link)

PDF Download
(Latest Version)

Datasheet Preview

(Latest Version)

Parametric

The parametric information displays vital features and performance metrics of the component, which helps engineers and supply chain managers to compare and choose the most appropriate electronic component for their applications and needs.

You must login to view the restricted information.

Click here to login

Product Line

Maximum DSP Block Frequency

Maximum MLAB Capacity

Device PCIe Hard IP Blocks

Number of Regional Clocks

Maximum LVDS Data Rate

Maximum Differential I/O Pairs

Maximum I/O Performance

Maximum Distributed RAM Bits

Digital Control Impedance

Number of I/O Banks

Mega Multiply Accumulates per second

Tolerant Configuration Interface Voltage

Minimum Storage Temperature

Number of Inter Dielectric Layers

Maximum Storage Temperature

Shift Registers

Number of Global Clocks

Copy Protection

Typical Supply Current

Maximum Power Dissipation

Temperature Flag

In-System Programmability

Maximum Internal Frequency

Supplier Temperature Grade

Reprogrammability Support

Tradename

Device Logic Gates

Device Logic Units

I/O Voltage

Typical Power Consumption

Maximum Quiescent Current

JTAG Support

Maximum Supply Current

Family Name

Maximum Number of User I/Os

Number of Registers

RAM Bits

Device Logic Cells

Number of Look-up Table Input

Device System Gates

Ethernet MACs

Minimum Operating Supply Voltage

Number of Multipliers

Processor Blocks

Typical Operating Supply Voltage

Transceiver Blocks

Maximum Operating Supply Voltage

Transceiver Speed

Program Memory Type

Dedicated DSP

PCI Blocks

Device Number of DLLs/PLLs

Total Number of Block RAM

Maximum Propagation Delay Time

Giga Multiply Accumulates per Second

Maximum Number of SERDES Channels

Speed Grade

Differential I/O Standards Supported

Single-Ended I/O Standards Supported

External Memory Interface

Supported IP Core

Supported IP Core Manufacture

Minimum Operating Temperature

Maximum Operating Temperature

Programmability

Process Technology

Crosses

Interested in More Free Data?

Discover a form-fit-function equivalent from another manufacturer or even suitable upgrades and downgrades, and much more.

Go Premium

No Credit Card. No Commitment.