Datasheets
CY7C341-35HXCT

CY7C341-35HXCT

Infineon Technologies AG
Description:

CPLD MAX® Family 3.75K Gates 192 Macro Cells 0.8um Technology 5V 84-Pin Windowed LCC T/R

Introduction date:May 29, 1997

Updated: +90 days

See more Complex Programmable Logic Devices - CPLDs by Infineon Technologies AG
Part Specifications

Overview

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LifeCyclePremium
EU RoHS Yes
RoHS Version2011/65/EU
Category Path
Semiconductor > Programmable Devices > Programmable Logic Devices > Complex Programmable Logic Devices - CPLDs

Datasheet

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Parametric

The parametric information displays vital features and performance metrics of the component, which helps engineers and supply chain managers to compare and choose the most appropriate electronic component for their applications and needs.

Product Line
Programmable Type
Supplier Temperature Grade
Tradename
Maximum Propagation Delay Time
Data Gate
Clock Management
Copy Protection
Individual Output Enable Control
Reprogrammability Support
Maximum Operating Current
Temperature Flag
Device System Gates
Maximum Internal Frequency
Maximum Clock to Output Delay
Number of Global Clocks
Maximum Operating Frequency
Tolerant Configuration Interface Voltage
Memory Size
Number of I/O Banks
Number of Inter Dielectric Layers
Minimum Storage Temperature
I/O Voltage
Maximum Storage Temperature
Family Name
Device Logic Cells
RAM Bits
Number of User I/Os
Speed Grade
Number of Product Terms per Macro
Number of Logic Blocks/Elements
Number of Macro Cells
Number of Flip Flops
Program Memory Type
Maximum Operating Supply Voltage
Process Technology
Minimum Operating Temperature
Maximum Operating Temperature
Minimum Operating Supply Voltage
Typical Operating Supply Voltage
Programmability
In-System Programmability

Crosses

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