74HC574PW/AUJ

74HC574PW/AUJ

Nexperia

Description:

Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1-Element

Updated:+90 days

Overview

Familiarize yourself with the fundamental general information, properties, and characteristics of the component, along with its compliance with industry standards and regulations.

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Category Path
Semiconductor > Standard and Specialty Logic > Standard Logic > Flip Flops

Datasheet

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Parametric

The parametric information displays vital features and performance metrics of the component, which helps engineers and supply chain managers to compare and choose the most appropriate electronic component for their applications and needs.

Product Line
Maximum Supply Current
Maximum Storage Temperature
Supplier Temperature Grade
Number of Output Enables per Element
Output Signal Type
Bus Hold
Set/Reset
Maximum Propagation Delay Time @ Maximum CL
Maximum High Level Output Current
Maximum Low Level Output Current
Input Signal Type
Maximum Frequency (50pF, 25°C) @ Vcc
Maximum Frequency (15pF, 25°C) @ Vcc
Maximum Propagation Delay (50pF, 25°C) @ Vcc
Maximum Propagation Delay (15pF, 25°C) @ Vcc
Number of Channels per Chip
Minimum Operating Supply Voltage
Maximum Operating Supply Voltage
Minimum Storage Temperature
Typical Operating Supply Voltage
Propagation Delay Test Condition
Maximum Quiescent Current
Absolute Propagation Delay Time
Logic Family
Logic Function
Process Technology
Number of Elements per Chip
Number of Element Inputs
Number of Element Outputs
Output Type
Polarity
Triggering Type
Minimum Operating Temperature
Maximum Operating Temperature

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