Datasheets
74HC259D

74HC259D

Toshiba

Description:

Latch Addressable 8-CH D-Type 16-Pin SOIC T/R

Country of Origin:

Japan

Introduction date:

May 23, 2016

Updated:20-DEC-2024

See more Latches by Toshiba
CAD Models
Part SpecificationsPrice & Availability

Overview

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LifeCyclePremium
EU RoHS Yes
RoHS Version2011/65/EU, 2015/863
EAR99
Automotive No
Supplier Cage CodeJ2925
8542390060
Schedule B8542390060
PPAP No
AEC Qualified No
Category Path
Semiconductor > Standard and Specialty Logic > Standard Logic > Latches

Datasheet

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Parametric

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Product Line
Typical Supply Current
Absolute Propagation Delay Time
Number of Input Enables per Element
Number of Output Enables per Element
Set/Reset
Number of Channels per Chip
Number of Selection Inputs per Element
Propagation Delay Test Condition
Maximum Low Level Output Current
Typical Quiescent Current
Maximum Supply Current
Supplier Temperature Grade
Maximum Propagation Delay Time @ Maximum CL
Bus Hold
Maximum High Level Output Current
Maximum Quiescent Current
Minimum Storage Temperature
Maximum Storage Temperature
Logic Family
Process Technology
Latch Mode
Type
Number of Elements per Chip
Number of Inputs per Chip
Number of Outputs per Chip
Output Type
Polarity
Minimum Operating Supply Voltage
Tolerant I/Os
Typical Operating Supply Voltage
Minimum Operating Temperature
Maximum Operating Supply Voltage
Maximum Operating Temperature

CAD Models

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