scaa084a, Evaluation Board for the CDCE925 PLL Clock Generator for Audio applications
参考設計 著者: Texas Instruments
scaa084a, Evaluation Board for the CDCE925 PLL Clock Generator for Audio applications. Two-Chip Solution to Generate all Frequencies for this System, A second PLL CDCE925 can be used with a 27MHz crystal to generate the rest of the clocks. The jitter performance of the clock driver is good and meets all jitter requirements of DSPs
