LIFCL-40-9MG289C
Lattice SemiconductorDeskripsi: | FPGA CrossLink-NX Family 39000 Cells 28nm Technology 1V 289-Pin CSBGA |
Tanggal Perkenalan: | Feb 17, 2021 |
Diperbarui:11-DEC-2024 | |
Lihat lebih banyak Field Programmable Gate Arrays - FPGAs oleh Lattice Semiconductor | |
Versi online:https://www.datasheets.com/id/part-details/lifcl-40-9mg289c-lattice-semiconductor-420269219
Ikhtisar
Kenali informasi umum, properti, dan karakteristik dasar komponen, beserta kepatuhannya terhadap standar dan regulasi industri.
Siklus hidupPremium
EU RoHS Yes
Versi RoHS2011/65/EU, 2015/863
EAR99
Otomotif No
Kode Kandang Pemasok66675
8542310060
Jadwal B8542310060
PPAP No
Kualifikasi AEC No
Jalur Kategori
Semiconductor > Programmable Devices > Programmable Logic Devices > Field Programmable Gate Arrays - FPGAs
Semiconductor > Programmable Devices > Programmable Logic Devices > Field Programmable Gate Arrays - FPGAs
Lembar Data
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Pratinjau Lembar Data
(Latest Versi)Parametrik
Informasi parametrik menampilkan fitur penting dan metrik kinerja komponen, yang membantu insinyur dan manajer rantai pasokan untuk membandingkan dan memilih komponen elektronik yang paling sesuai untuk aplikasi dan kebutuhan mereka.
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lini produk
Maximum Distributed RAM Bits
I/O Voltage
Shift Registers
Number of Global Clocks
Copy Protection
Typical Supply Current
Maximum Power Dissipation
Temperature Flag
Supplier Temperature Grade
In-System Programmability
Digital Control Impedance
Number of I/O Banks
Mega Multiply Accumulates per second
Tolerant Configuration Interface Voltage
Minimum Storage Temperature
Number of Inter Dielectric Layers
Maximum Storage Temperature
Maximum DSP Block Frequency
Maximum MLAB Capacity
Device PCIe Hard IP Blocks
Number of Regional Clocks
Maximum LVDS Data Rate
Maximum Differential I/O Pairs
Maximum I/O Performance
Typical Power Consumption
Maximum Quiescent Current
JTAG Support
Maximum Supply Current
Maximum Internal Frequency
Reprogrammability Support
Tradename
Device Logic Gates
Device Logic Units
Family Name
Maximum Number of User I/Os
Number of Registers
RAM Bits
Device Logic Cells
Number of Look-up Table Input
Device System Gates
Ethernet MACs
Minimum Operating Supply Voltage
Number of Multipliers
Typical Operating Supply Voltage
Processor Blocks
Maximum Operating Supply Voltage
Transceiver Blocks
Transceiver Speed
Program Memory Type
Dedicated DSP
PCI Blocks
Device Number of DLLs/PLLs
Total Number of Block RAM
Maximum Propagation Delay Time
Giga Multiply Accumulates per Second
Maximum Number of SERDES Channels
Speed Grade
Differential I/O Standards Supported
Single-Ended I/O Standards Supported
External Memory Interface
Supported IP Core
Supported IP Core Manufacture
Minimum Operating Temperature
Maximum Operating Temperature
Programmability
Process Technology