TIPD142, DAC Sample and Hold Glitch Reduction Reference Design

參考設計 屬於: Texas Instruments

TIPD142, DAC Sample and Hold Glitch Reduction Reference Design
TIPD142, DAC Sample and Hold Glitch Reduction Reference Design. The DAC R-2R architectures display great performance in regards to noise and accuracy, but at a cost of large glitch area. This design focuses on the reduction of major-carry glitches that occur from code specific transitions in DAC R-2R architectures. This design reduces this glitch area, making it suitable for glitch-sensitive applications such as waveform generation