Datasheets
XCVU095-2FFVB1517I

XCVU095-2FFVB1517I

Advanced Micro Devices, Inc.

描述:

FPGA Virtex UltraScale Family 1176000 Cells 20nm Technology 0.95V 1517-Pin FCBGA

推出日期:

Dec 10, 2013

更新:30-OCT-2024

查看更多 Field Programmable Gate Arrays - FPGAs 屬於 Advanced Micro Devices, Inc.
參考設計
部件規格

概述

熟悉元件的基本一般資訊、特性和特點，以及其符合產業標準和法規的情況。

生命週期高級
歐盟RoHS Yes
RoHS版本2011/65/EU, 2015/863
3A001.a.7.b
汽車 No
供應商CAGE代碼6Z9Z3
8542310060
排程B8542310060
PPAP No
AEC合格 No
類別路徑
Semiconductor > Programmable Devices > Programmable Logic Devices > Field Programmable Gate Arrays - FPGAs

數據手冊

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供應商數據表
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PDF下載
(Latest 版本)

數據表預覽

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製造

製造資訊指定了生產和組裝元件的技術要求和規格。這些資訊對於製造商來說非常重要，以維護元件的品質和可靠性，並確保它們與其他設備和元件兼容。

Reflow Temp. Source
Wave Temp. Source

參數

參數資訊顯示了元件的重要特性和性能指標，這有助於工程師和供應鏈經理比較和選擇最適合他們應用和需求的電子元件。

生產線
Maximum DSP Block Frequency
Maximum MLAB Capacity
Device PCIe Hard IP Blocks
Number of Regional Clocks
Maximum LVDS Data Rate
Maximum Differential I/O Pairs
Maximum I/O Performance
Maximum Distributed RAM Bits
Digital Control Impedance
Number of I/O Banks
Mega Multiply Accumulates per second
Tolerant Configuration Interface Voltage
Minimum Storage Temperature
Number of Inter Dielectric Layers
Maximum Storage Temperature
Shift Registers
Number of Global Clocks
Copy Protection
Typical Supply Current
Maximum Power Dissipation
Temperature Flag
In-System Programmability
Maximum Internal Frequency
Supplier Temperature Grade
Reprogrammability Support
Tradename
Device Logic Gates
Device Logic Units
I/O Voltage
Typical Power Consumption
Maximum Quiescent Current
JTAG Support
Maximum Supply Current
Family Name
Maximum Number of User I/Os
Number of Registers
RAM Bits
Device Logic Cells
Number of Look-up Table Input
Device System Gates
Ethernet MACs
Minimum Operating Supply Voltage
Number of Multipliers
Processor Blocks
Typical Operating Supply Voltage
Transceiver Blocks
Maximum Operating Supply Voltage
Transceiver Speed
Program Memory Type
Dedicated DSP
PCI Blocks
Device Number of DLLs/PLLs
Total Number of Block RAM
Maximum Propagation Delay Time
Giga Multiply Accumulates per Second
Maximum Number of SERDES Channels
Speed Grade
Differential I/O Standards Supported
Single-Ended I/O Standards Supported
External Memory Interface
Supported IP Core
Supported IP Core Manufacture
Minimum Operating Temperature
Maximum Operating Temperature
Programmability
Process Technology

參考設計

透過我們的參考設計集合，啟發靈感並獲得指引。探索展示電子元件能力的實用實現方案。透過詳細的文件和原理圖，加快開發過程並創建高效解決方案。

XUSP3S-0U-A095V2E-44-E4E4-T0X-4111GO0-6, XUSP3S PCIe FPGA Board based on Xilinx UltraScale 3/4-Length PCIe Board with Quad QSFP, DDR4 and QDR-II+
XUSP3S-0U-A095V2E-44-E4E4-T0X-4111GO0-6, XUSP3S PCIe FPGA Board based on Xilinx UltraScale 3/4-Length PCIe Board with Quad QSFP, DDR4 and QDR-II+
XUSPL4, PCIe FPGA Board based on Xilinx UltraScale Low-Profile PCIe Board with Dual QSFP and DDR4
XUSPL4, PCIe FPGA Board based on Xilinx UltraScale Low-Profile PCIe Board with Dual QSFP and DDR4
XUSP3S-0U-A095V2E-44-E4E4-T0X-4111GS0-6, XUSP3S PCIe FPGA Board based on Xilinx UltraScale 3/4-Length PCIe Board with Quad QSFP, DDR4 and QDR-II+
XUSP3S-0U-A095V2E-44-E4E4-T0X-4111GS0-6, XUSP3S PCIe FPGA Board based on Xilinx UltraScale 3/4-Length PCIe Board with Quad QSFP, DDR4 and QDR-II+
XUSP3S-0U-A095V2E-44-E4E4-T0X-4111G0-6, XUSP3S PCIe FPGA Board based on Xilinx UltraScale 3/4-Length PCIe Board with Quad QSFP, DDR4 and QDR-II+
XUSP3S-0U-A095V2E-44-E4E4-T0X-4111G0-6, XUSP3S PCIe FPGA Board based on Xilinx UltraScale 3/4-Length PCIe Board with Quad QSFP, DDR4 and QDR-II+

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