Aptina HiSPi to Parallel Sensor Bridge Reference Design using the LatticeMachXO2-1200 CPLD

Aptina HiSPi to Parallel Sensor Bridge Reference Design. To support higher bandwidth sensors, Aptina Imaging has introduced a high-speed serial interface called HiSPi. The HiSPi interface can operate from one to four lanes of serial data, plus one clock lane. Each signal is differential and can run at speeds up to 700 Mbps. To interface to an ISP with a traditional parallel bus, Lattice has created a bridge from HiSPi to a parallel format. The LatticeXP2-5 or LatticeMachXO2-1200 non-volatile FPGA provides an efficient and cost-effective solution for HiSPi-to-parallel bridging