AD9625-2.0EBZ, Evaluation Board based on AD9625 12-Bit, 2 GSPS Analog to Digital Converter

AD9625-2.0EBZ, Evaluation Board for the AD9625 is a 12-bit ADC with sampling speeds of up to 2 GSPS. It is designed to support wideband applications where high sample rates, small size, wide bandwidth and versatility are desired. The ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. This reference design includes the device data capture board via the JESD204B serial interface and the SPI interface. The samples are written to the internal memory on the FPGA capture board. It allows programming the device and monitoring its internal registers via SPI