Si5380-EVB, Evaluation Kit for the Si5380 Ultra Low Jitter, Any Frequency, 12-output JESD204B Clock Generator
Projeto de referência por: Silicon Labs
Si5380-EVB, Evaluation Kit is used for evaluating the Si5380 Ultra Low Jitter, Any Frequency, 12-output JESD204B Clock Generator. The Si5380 employs 4th generation DSPLL technology to enable clock generation for LTE/JESD204B applications which require the highest level of jitter performance. The Si5380-EVB has four independent input clocks and a total of 12 outputs. The Si5380-EVB can be easily controlled and configured using Clock Builder Pro (CBPro) software tool