Increasing the Number of Outputs from a Clock Source Using Low Jitter LVPECL Fan-out Buffers

Projeto de referência por: Analog Devices

Increasing the Number of Outputs from a Clock Source Using Low Jitter LVPECL Fan-out Buffers
Circuit interfaces ADF4351 integrated phase-locked loop (PLL) and voltage-controlled oscillator (VCO) to ADCLK948, which provides up to eight differential, low voltage, positive emitter coupled logic (LVPECL) outputs from one differential output of ADF4351