Analog Front End for Low Latency FSK Control Loop System Based ADC
Projekt referencyjny przez: Analog Devices
![Analog Front End for Low Latency FSK Control Loop System Based ADC](/_next/image?url=https%3A%2F%2Fdownload.datasheets.com%2Fpdfs%2F2011%2F1%2F5%2F2%2F0%2F25%2F22%2Fmax_%2Fmanual%2Fan3715_fig.2.jpg&w=1920&q=75)
Analog Front End for Low Latency FSK Control Loop System Based ADC. This design uses ADCs for two purposes: to digitize the input signals, and to utilize the ADC outputs to control the PL. Here, the input signals are digitized by the two MAX176 12-bit ADCs