ADS61B49EVM, Evaluation Board for ADS61B49 device, 14-bit 250 MSPS analog to digital converter

ADS61B49EVM, Evaluation Board that allows designers to evaluate the performance of ADS61B49 device, a low power 14-bit 250 MSPS analog to digital converter with a fully buffered differential input. The ADC features a configurable parallel DDR LVDS or CMOS outputs. The EVM provides a flexible environment to test the ADS61B49 under a variety of clock, input and supply conditions. The ADS61B49EVM also includes 10 Output Low Jitter Clock Synchronizer and Jitter Cleaner device, the CDCE72010, which can be used to drive the clocking input to the ADS61B49. Open sockets are provided for an external VCXO and crystal band pass filter allowing for rapid evaluation of a combined high performance ADC and clocking circuit equivalent to a final system level solution