74HC4050N,652

74HC4050N,652

Nexperia

Description:

Buffer/Converter 6-CH Non-Inverting CMOS 16-Pin PDIP Bulk

Introduction date:

Aug 27, 1997

Updated:+90 days

Overview

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LifeCyclePremium
EU RoHS Yes
RoHS Version2011/65/EU, 2015/863
Category Path
Semiconductor > Standard and Specialty Logic > Specialty Logic > Buffers and Line Drivers

Datasheet

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Parametric

The parametric information displays vital features and performance metrics of the component, which helps engineers and supply chain managers to compare and choose the most appropriate electronic component for their applications and needs.

Product Line
Absolute Propagation Delay Time
Maximum Storage Temperature
Typical Quiescent Current
Maximum Quiescent Current
Supplier Temperature Grade
Minimum Test Temperature
Maximum Test Temperature
Maximum Supply Current
Typical Supply Current
Maximum High Level Output Current
Number of Input Enables per Chip
Number of Output Enables per Chip
Number of Channels per Chip
Bus Hold
Maximum Propagation Delay Time @ Maximum CL
Maximum Power Dissipation
Minimum Storage Temperature
Input Signal Type
Propagation Delay Test Condition
Logic Family
Logic Function
Number of Elements per Chip
Number of Inputs per Chip
Number of Outputs per Chip
Polarity
Output Type
Maximum Low Level Output Current
Minimum Operating Supply Voltage
Typical Operating Supply Voltage
Maximum Operating Supply Voltage
Tolerant I/Os
Minimum Operating Temperature
Maximum Operating Temperature
Process Technology

CAD Models

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