TIDA-00353, Equalization Optimization of a JESD204B Serial Link Reference Design

참조 설계 작성자: Texas Instruments

TIDA-00353, Equalization Optimization of a JESD204B Serial Link Reference Design
TIDA-00353, Equalization Optimization of a JESD204B Serial Link Reference Design. Employing equalization techniques is an effective way of compensating for channel loss in JESD204B high speed serial interfaces for data converters. This reference design features the ADC16DX370, a dual 16-bit, 370 MSPS analog-to-digital converter (ADC) that utilizes de-emphasis equalization to prepare the 7.4 Gbps serial data for transmission. Configuration allows a user to optimize the de-emphasis setting (DEM) and output voltage swing setting (VOD) of the output driver to inversely match the characteristics of the channel