SERDESUR-65USB/NOPB, Evaluation Kit for the DS90UR905Q and DS90UR906Q FPD-Link II Serializer/Deserializer chipset

참조 설계 작성자: Texas Instruments

SERDESUR-65USB/NOPB, Evaluation Kit for the DS90UR905Q and DS90UR906Q FPD-Link II Serializer/Deserializer chipset
SERDESUR-65USB/NOPB, Evaluation Kit for the DS90UR905Q and DS90UR906Q FPD-Link II Serializer/Deserializer chipset. The DS90UR905Q Serializer board accepts LVCMOS input signals and provides a single serialized FPD-Link II LVDS data pair as an output. The DS90UR906Q Deserializer board accepts the LVDS serialized data stream and converts the data back into parallel LVCMOS signals. A USB cable is provided as a generic medium for the high speed data link. Jumpers and switches on the boards can be configured for evaluation of chipset features such as pre-emphasis, equalization, SSCG and backward compatibility. An I2C interface provides an alternative method to configure features of the serializer and deserializer