CDCL6010EVM evaluation module for CDCL6010 which is a 1:11 high-performance, low phase noise clock synthesizer

참조 설계 작성자: Texas Instruments

CDCL6010EVM evaluation module for CDCL6010 which is a 1:11 high-performance, low phase noise clock synthesizer
CDCL6010EVM, is an evaluation module designed to aid in evaluating the performance of the CDCL6010, which is a 1:11 high-performance, low phase noise clock synthesizer that synchronizes its on-chip voltage controlled oscillator (VCO) frequency to an external reference clock, generates low phase noise (jitter) clock. The PLL loop bandwidth and damping factor can be modified by changing the on-board passive loop filter components to meet different system requirements. The input divider, feedback divider and output dividers are done through the programming interface. As the system requires external components like a microcontroller to aid in programming the device and a very clean power supply for the device, this EVM provides an excellent way to evaluate and modify the performance and parameters of the clock system in conjunction with the specific customer application