ADZS-21161N-EZLITE, ADSP-21161N EZ-KIT Lite Evaluation System based on SHARC Digital Signal Processors (DSPs)
참조 설계 작성자: Analog Devices
ADZS-21161N-EZLITE, ADSP-21161N EZ-KIT Lite Evaluation System for the SHARC digital signal processors (DSPs). SHARC processors are based on a 32-bit super Harvard architecture that includes a unique memory architecture comprised of two large on-chip, dual-ported SRAM blocks coupled with a sophisticated IO processor, which gives a SHARC processor the bandwidth for sustained high-speed computations. SHARC processors represent today's de facto standard for floating-point processor targeted for premium audio applications. The evaluation system is designed to be used in conjunction with the VisualDSP++ development environment to test the capabilities of the ADSP-21161N SHARC processors. The VisualDSP++ development environment gives you the ability to perform advanced application code development