10 to 160MHz Clock Buffer AN-746 Application Circuit
참조 설계 작성자: Analog Devices
AN-746 - ADN2812 is a continuous rate clock recovery, data-retiming device based on a multi-loop PLL architecture. ADN2812 can automatically lock to any data rate from 10 Mbps to 2.7 Gbps, recover clock, and retime data without programming and without need for an external reference clock as an acquisition aid
