NB6N11SMNGEVB, Clock/Data Receiver Evaluation Board

参考設計 著者: onsemi

NB6N11SMNGEVB, Clock/Data Receiver Evaluation Board
NB6N11SMNGEVB, Clock/Data Receiver Evaluation Board. The NB6N11S is a differential 1:2 Clock or Data Receiver and will accept Any Level input signals of LVPECL, CML, LVCMOS, LVTTL, or LVDS. These signals will be translated to LVDS and two identical copies of Clock or Data will be distributed, operating up to 2.0 GHz or 2.5 Gb/s, respectively. As such, the NB6N11S is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock or Data distribution applications. The NB6N11S has a wide input common mode range from GND + 50mV to VCC - 50 mV. Combined with the 50-ohm internal termination resistors at the inputs, the NB6N11S is ideal for translating a variety of differential or single-ended Clock or Data signals to 350 mV typical LVDS output levels