A 16-Bit, 300 kSPS Low Power Successive Approximation ADC System with Optimum Low Power Drive Amplifier for Sub-Nyquist Input Signals Up to 4 kHz

参考設計 著者: Analog Devices

A 16-Bit, 300 kSPS Low Power Successive Approximation ADC System with Optimum Low Power Drive Amplifier for Sub-Nyquist Input Signals Up to 4 kHz
Circuit is a 16-bit, 300 kSPS successive approximation analog-to-digital converter system that has a drive amplifier that is optimized for a low system power dissipation of 10.75 mW for input signals up to 4 kHz and sampling rates of 300 kSPS