Typical Simplified Application Circuit for TPS51206 2A Peak Sink/Source DDR Termination Regulator with VTTREF Buffered Reference for DDR2, DDR3 and DDR3L

Conception de référence par: Texas Instruments

Typical Simplified Application Circuit for TPS51206 2A Peak Sink/Source DDR Termination Regulator with VTTREF Buffered Reference for DDR2, DDR3 and DDR3L