TIDA-00153, JESD204B Link Latency Design Using a High Speed ADC

TIDA-00153, JESD204B Link Latency Design Using a High Speed ADC.JESD204B links are the latest trend in data-converter digital interfaces. These links take advantage of high-speed serial-digital technology to offer many compelling benefits including improved channel densities. This reference design addresses one of the challenges of adopting the new interface: understanding and designing the link latency. An example achieves deterministic latency and determines the link latency of a system containing the LM97937 ADC and Xilinx Kintex 7 FPGA