
32-bit ARM Cortex M3 RISC microcontroller featuring 128KB Flash program memory and 16KB RAM. This surface-mount device operates at up to 36 MHz with a 32-bit data bus and RISC instruction set. It offers 80 programmable I/Os, 3 timers, and multiple interfaces including 2x I2C, 2x SPI, and 3x USART. Packaged in a 100-pin LQFP (14x14x1.4mm) with 0.5mm pin pitch, it supports a supply voltage range of 2.5V to 3.3V and operates from -40°C to 85°C. Includes 16 ADC channels.
Stmicroelectronics STM32F101VBT6TR technical specifications.
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | QFP |
| Package/Case | LQFP |
| Package Description | Low Profile Quad Flat Package |
| Lead Shape | Gull-wing |
| Pin Count | 100 |
| PCB | 100 |
| Package Length (mm) | 14 |
| Package Width (mm) | 14 |
| Package Height (mm) | 1.4 |
| Seated Plane Height (mm) | 1.6(Max) |
| Pin Pitch (mm) | 0.5 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-026BED |
| Family Name | STM32F |
| Data Bus Width | 32bit |
| Instruction Set Architecture | RISC |
| Maximum Clock Rate | 36MHz |
| Maximum CPU Frequency | 36MHz |
| Device Core | ARM Cortex M3 |
| Program Memory Type | Flash |
| Program Memory Size | 128KB |
| RAM Size | 16KB |
| Number of Programmable I/Os | 80 |
| Core Architecture | ARM |
| Programmability | Yes |
| Number of Timers | 3 |
| Interface Type | I2C/SPI/USART |
| CAN | 0 |
| I2C | 2 |
| SPI | 2 |
| Ethernet | 0 |
| UART | 0 |
| USART | 3 |
| USB | 0 |
| I2S | 0 |
| Max Operating Supply Voltage | 3.6V |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
| ADC Channels | 16 |
| Number of ADCs | Single |
| Cage Code | SCR76 |
| EU RoHS | Yes |
| HTS Code | 8542310001 |
| Schedule B | 8542310000 |
| ECCN | 3A991.a.2 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Download the complete datasheet for Stmicroelectronics STM32F101VBT6TR to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.