CDCM6100XEVM, Evaluation Module for the CDCM61001 or CDCM61002 or CDCM61004 are high-performance, low phase noise Clock Generators

CDCM6100xEVM, Evaluation Module for CDCM61004 or CDCM61002 or CDCM61001 are a highly versatile, ultra low-jitter frequency synthesizer family that can generate four/two/one low-jitter clock output pairs, selectable among LVPECL, LVDS, or 2 LVCMOS, from a low-frequency crystal or LVCMOS input for a variety of wireline and data communication applications. Input frequency range at 21.875 MHz to 28.47 MHz. The CDCM6100x features an on-board PLL that can be easily configured solely through control pins. This device a perfect choice for use in demanding applications such as SONET, Ethernet, Fiber Channel and SAN. The CDCM6100x is a programmable clock generator with control pins only. No EEPROM or programming interface is necessary to program these devices